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2SJ546

Silicon P Channel MOS FET High Speed Power Switching

Hitachi -> Renesas Electronics 

2SJ546

Reverse Drain Current vs.

Source to Drain Voltage

–20

–16

–10 V –5 V

–12

–8

VGS = 0, 5 V

–4

Pulse Test

0

–0.4 –0.8 –1.2 –1.6 –2.0

Source to Drain Voltage VSD (V)

Maximum Avalanche Energy vs.

Channel Temperature Derating

20

I AP = –15 A

16

V DD = –25 V

duty < 0.1 %

Rg > 50 Ω

12

8

4

0

25 50 75 100 125 150

Channel Temperature Tch (°C)

Vin

–15 V

Avalanche Test Circuit

V DS

Monitor

Rg

50 Ω

L

I AP

Monitor

D. U. T

VDD

Avalanche Waveform

EAR =

1

2

• L • I AP2•

VDSS

VDSS – V DD

I AP

ID

V(BR)DSS

VDS

VDD

0

6

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