SM5903BF(1999) Ver la hoja de datos (PDF) - Nippon Precision Circuits

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SM5903BF
(Rev.:1999)

compression and non compression type shock-proof memory controller

Nippon Precision Circuits  

SM5903BF

Low-voltage:(VDD1 = VDD2 = 2.4 to 3.0 V, VSS = 0 V, Ta = - 20 to 70 ˚C)

Parameter

Pin

Symbol

Condition

Rating

Unit

Min

Typ

Max

Current consumption VDD

IDD

(*B)SHPRF ON

4.5

8.0

mA

(*B)Through mode

1.8

3.0

mA

Input voltage

CLK

H level

VIH1

0.7VDD

V

L level

VIL1

0.3VDD

V

VINAC

AC coupling

1.0

VP-P

(*2,3,4) H level VIH2

0.7VDD

V

L level

VIL2

0.3VDD

V

(*5)

H level

VIH3

0.6VDD

V

L level

VIL3

0.2VDD

V

Output voltage

(*4,6) H level VOH1

IOH = - 0.5 mA VDD - 0.4

V

L level

VOL1

IOL = 0.5 mA

0.4

V

(*5,7) H level VOH2

IOH = - 0.5 mA VDD - 0.4

V

L level

VOL2

IOL = 0.5 mA

0.4

V

Input current

CLK

IIH1

VIN = VDD

5

15

115

µA

IIL1

VIN = 0V

5

15

115

µA

(*3,4)

IIL2

VIN = 0V

1

2.5

15

µA

Input leakage current (*2,3,4,5)

ILH

VIN = VDD

1.0

µA

(*2,5)

ILL

VIN = 0V

1.0

µA

(*B) VDD1 = VDD2 = 3 V, CLK input frequency fXTI= 384fs = 16.9344 MHz, all outputs unloaded,

SHPRF: Shock-proof,

typical values are for VDD1 = VDD2 = 3 V.

<Pin summary>

(*1) Pin function

Pin name

(*2) Pin function

Pin name

(*3) Pin function

Pin name

(*4) Pin function

Pin name

(*5) Pin function

Pin name

(*6) Pin function

Pin name

(*7) Pin function

Pin name

Clock input pin (AC input)

CLK

Schmitt input pins

YSRDATA, YLRCK, YSCK, YFLAG, YFCLK, NRESET,

YBLKCK, YDMUTE, YMLD, YMDATA, YMCLK

Schmitt input pin with pull-up

NTEST

I/O pins (Schmitt input with pull-up in input state)

UC1, UC2, UC3, UC4, UC5

I/O pins (Schmitt input in input state)

D0, D1, D2, D3

Outputs

ZSCK, ZLRCK, ZSRDATA, ZSENSE

Outputs

NCAS, NWE, NRAS, A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, A10

NIPPON PRECISION CIRCUITS-5

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