RF2629 Ver la hoja de datos (PDF) - RF Micro Devices
Número de pieza
componentes Descripción
Lista de partido
RF2629 Datasheet PDF : 6 Pages
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RF2629
Pin
1
2
3
4
Function
IN+
Description
Balanced input pin. This pin is internally DC-biased and should be DC
blocked if connected to a device with a DC level, other than VCC,
present. A DC to connection to VCC is acceptable. For single-ended
input operation, one pin is used as an input and the other input is AC-
coupled to ground. The balanced input impedance is 1kΩ, while the
single-ended input impedance is 500Ω.
Interface Schematic
VCC
CDMA+
580 Ω
580 Ω
CDMA-
IN-
GND
GC
Same as pin 2, except complementary input.
See pin 1 schematic.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are valid only for a 3.3kΩ DC source
impedance.
VCC
12.7 kΩ
23.5 kΩ
15 kΩ
5
OUT-
Balanced output pin. This is an open-collector output, designed to
operate into a 500Ω balanced load. The load sets the operating imped-
ance, but an external choke or matching inductor to VCC must also be
OUT+
OUT-
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to VCC, a DC-blocking capacitor must
be used if the next stage’s input has a DC path to ground.
6
OUT+
Same as pin 5, except complementary output.
See pin 5 schematic.
7
VCC1
Supply voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane. Pins 7 and 8 may share one bypass capacitor if trace
lengths are kept minimal.
8
VCC2
Same as pin 7.
10
Rev B4 010720
10-41
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