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RF2461 Ver la hoja de datos (PDF) - RF Micro Devices

Número de pieza
componentes Descripción
Lista de partido
RF2461 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Preliminary
RF2461
Pin Function Description
Interface Schematic
15
IF2+
First differential output pin for the second mixer. Open collector. A cur-
rent combiner external network performs a differential to single-ended
conversion and sets the output impedance. A DC blocking cap must be
present if the IF filter input has a DC path to ground. Mixer (IF2+ and
IF2-) needs to “see” a differential impedance between 2kto 4k.
IF2-
IF2+
16
VCC2
VCC pin for the LO buffer/bias circuitry.*
17
LO IN
LO limiter input pin.
LO IN
18
ENABLE This pin is used to enable or disable the RF2461. A logic high (>2.0V)
enables the circuitry. A logic low (<1.0V) disables the circuitry.
ENABLE
19
IP SET
Controls the setting of the LNA current. A logic low (<1.0V) selects the
internal resistance (49.5k), resulting in an LNA current of 5mA. A
IP SET
logic high (>2.0V) selects the external resistance at pin 8.
8
20
IF SEL
Determines which IF port is active. A logic low (<1.0V) activates IF1
and deactivates IF2. A logic high (>2.0V) activates IF2 and deactivates
IF1.
IF SEL
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with mul-
tiple vias.
*The bias circuitry current drop when LO signal is not present. Total LO buffer/bias circuitry current is 7mA when LO sig-
nal is present.
Rev A13 010607
8-127

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