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USB3300-EZK-TR Datasheet PDF : 55 Pages
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Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
Table 3.1 USB3300 Pin Definitions 32-Pin QFN Package (continued)
DIRECTION, ACTIVE
PIN
NAME
TYPE
LEVEL DESCRIPTION
16
VDD3.3
17
DATA[7]
18
DATA[6]
19
DATA[5]
20
DATA[4]
21
DATA[3]
22
DATA[2]
23
DATA[1]
24
DATA[0]
25
VDD3.3
26
VDD1.8
27
XO
28
XI
29
VDDA1.8
Power
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
I/O,
CMOS,
Pull-low
Power
Power
Output,
Analog
Input,
Analog
Power
N/A A 0.1uF bypass capacitor should be connected
between this pin and the ground plane on the PCB.
N/A 8-bit bi-directional data bus. Bus ownership is
determined by DIR. The Link and PHY initiate data
transfers by driving a non-zero pattern onto the data
bus. ULPI defines interface timing for a single-edge
N/A data transfers with respect to rising edge of
CLKOUT. DATA[7] is the MSB and DATA[0] is the
LSB.
N/A
N/A
N/A
N/A
N/A
N/A
N/A A 0.1uF bypass capacitor should be connected
between this pin and the ground plane on the PCB.
N/A 1.8V for digital circuitry on chip. Supplied by On-Chip
Regulator when REG_EN is active. When using the
internal regulators, place a 4.7uF low-ESR capacitor
near this pin and connect the capacitor from this pin
to ground. Connect pin 26 to pin 15. Do not connect
VDD1.8 to VDDA1.8 when using internal regulators.
When the regulators are disabled, pin 29 may be
connected to pins 26 and 15.
N/A Crystal pin. If using an external clock on XI this pin
should be floated.
N/A Crystal pin. A 24MHz crystal is supported. The
crystal is placed across XI and XO. An external
24MHz clock source may be driven into XI in place
of a crystal.
N/A 1.8V for analog circuitry on chip. Supplied by On-
Chip Regulator when REG_EN is active. Place a
0.1uF capacitor near this pin and connect the
capacitor from this pin to ground. When using the
internal regulators, place a 4.7uF low-ESR capacitor
near this pin in parallel with the 0.1uF capacitor. Do
not connect VDD1.8A to VDD1.8 when using internal
regulators. When the regulators are disabled, pin 29
may be connected to pins 26 and 15.
Revision 1.08 (11-07-07)
12
DATASHEET
SMSC USB3300

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