Freescale Semiconductor, Inc.
tf
tr
90%
CLK 50%
10%
tw
tw
1/fclk
tPLH
tPHL
OUTPUT A
(DATA OUT)
90%
50%
10%
V+
GND
ENB
50%
OUTPUT A
tPLZ
tPZL
10%
tTLH
tTHL
Figure 1.
Figure 2.
V+
GND
50%
VALID
Din
50%
tsu
th
CLK
50%
Figure 3.
tw
V+
ENB
50%
GND
V+
CLK
GND
tsu
50%
FIRST
CLOCK
th
LAST
CLOCK
tw
V+
GND
trec
V+
GND
Figure 4.
TEST POINT
DEVICE
UNDER
TEST
CL*
* Includes all probe and fixture capacitance.
Figure 5.
DEVICE
UNDER
TEST
V+
TEST POINT
7.5 kΩ
CL*
* Includes all probe and fixture capacitance.
Figure 6.
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS DEVICE DATA For More Information On This Product,
Go to: www.freescale.com
MC145220
5