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ML9059E Ver la hoja de datos (PDF) - LAPIS Semiconductor Co., Ltd.

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ML9059E Datasheet PDF : 72 Pages
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LAPIS Semiconductor
FEDL9059E-01
ML9059E
Function Pin name Number I/O
of pins
Power
supply
circuit
VC5+
VC6+
3
O
3
O
SEG0 to
SEG131
132
O
LCD
Drive
output
COM0 to
COM47
48
O
COMS0
COMS1
2
O
Test pin TEST1
1
O
DUMMY
67
DUMMY-
11
B
Description
These are the pins for connecting the positive side of the capacitors
for voltage multiplication.
Connect capacitors between VS1– and these pins.
For 2-time voltage multiplication, the pins are configured as inputs
for voltage multiplication.
These are the pins for connecting the positive side of the capacitors
for voltage multiplication.
Connect capacitors between VS2– and these pins.
These are the LCD segment drive outputs.
One of the levels among V1, V3, V4, and VSS is selected depending
on the combination of the display RAM content and the FR signal
RAM Data
H
H
L
L
Power save
Output voltage
FR
Forward display Reverse display
H
V1
V3
L
VSS
V4
H
V3
V1
L
V4
VSS
VSS
The output voltage is VSS when the Display OFF command is
executed.
These are the LCD common drive outputs.
One of the levels among V1, V2, V5, and VSS is selected depending
on the combination of the scan data and the FR signal.
Scan data
FR
H
H
H
L
L
H
L
L
Power save
Output voltage
VSS
V1
V2
V5
VSS
The output voltage is VSS when the Display OFF command is
executed.
These are the common output pins only for indicators. Both pins
output the same signal. Leave these pins open when they are not
used. The same signal is output in both master and slave
operation modes.
These are the pins for testing the IC chip. Leave these pins open
during normal use.
Leave this pin open.
19/72

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