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ICS9248F-50-T Ver la hoja de datos (PDF) - Integrated Circuit Systems

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ICS9248F-50-T
ICST
Integrated Circuit Systems ICST
ICS9248F-50-T Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
General Layout Precautions:
1) Use a ground plane on the top layer of the
PCB in all areas not used by traces.
2) Make all power traces and vias as wide as
possible to lower inductance.
Notes:
1 All clock outputs should have series
terminating resistor. Not shown in
all places to improve readibility of
diagram
2 Optional EMI capacitor should be
used on all CPU, SDRAM, and PCI
outputs.
3 Optional crystal load capacitors are
recommended.
ICS9248-50
Capacitor Values:
C1, C2 : Crystal load values determined by user
All unmarked capacitors are 0.01µF ceramic
9

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