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IRFZ44

N-channel enhancement mode TrenchMOS transistor

Philips Electronics 

Philips Semiconductors

N-channel enhancement mode

TrenchMOSTM transistor

Product specification

IRFZ44N

GENERAL DESCRIPTION

N-channel enhancement mode

standard level field-effect power

transistor in a plastic envelope using

’trench’ technology. The device

features very low on-state resistance

and has integral zener diodes giving

ESD protection up to 2kV. It is

intended for use in switched mode

power supplies and general purpose

switching applications.

QUICK REFERENCE DATA

SYMBOL PARAMETER

VDS

ID

Ptot

Tj

RDS(ON)

Drain-source voltage

Drain current (DC)

Total power dissipation

Junction temperature

Drain-source on-state

resistance

VGS = 10 V

MAX.

55

49

110

175

22

PINNING - TO220AB

PIN

DESCRIPTION

1 gate

2 drain

3 source

tab drain

PIN CONFIGURATION

tab

1 23

SYMBOL

d

g

s

UNIT

V

A

W

˚C

mΩ

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

VDS

VDGR

±VGS

ID

ID

IDM

Ptot

Tstg, Tj

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Drain current (DC)

Drain current (DC)

Drain current (pulse peak value)

Total power dissipation

Storage & operating temperature

-

RGS = 20 kΩ

-

Tmb = 25 ˚C

Tmb = 100 ˚C

Tmb = 25 ˚C

Tmb = 25 ˚C

-

ESD LIMITING VALUE

SYMBOL

VC

PARAMETER

Electrostatic discharge capacitor

voltage, all pins

CONDITIONS

Human body model

(100 pF, 1.5 kΩ)

THERMAL RESISTANCES

SYMBOL

Rth j-mb

Rth j-a

PARAMETER

Thermal resistance junction to

mounting base

Thermal resistance junction to

ambient

CONDITIONS

-

in free air

MIN.

-

-

-

-

-

-

-

- 55

MAX.

55

55

20

49

35

160

110

175

UNIT

V

V

V

A

A

A

W

˚C

MIN.

-

MAX.

2

UNIT

kV

TYP.

-

60

MAX.

1.4

-

UNIT

K/W

K/W

February 1999

1

Rev 1.000

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