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A6812 Hoja de datos - Allegro MicroSystems

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Número de pieza
A6812

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9 Pages

File Size
329 kB

Fabricante
Allegro
Allegro MicroSystems Allegro

Description
The A6812 device combines a 20-bit CMOS shift register, ac com pa ny ing data latches and control cir cuit ry with bipolar sourcing out puts ,and PNP active pull-downs. De signed pri mar ily to drive vacuum-flu o res cent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6812 features an increased data-input rate (com pared with the older UCN/UCQ5812-F) and a controlled output slew rate.


FEATUREs and Benefits
▪ Controlled output slew rate
▪ High-speed data storage
▪ 60 V minimum output break down
▪ High data-input rate
▪ PNP active pull-downs
▪ Low output-saturation voltages
▪ Low-power CMOS logic and latches
▪ Improved replacements for TL5812x, UCN5812x, and UCQ5812x

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