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AT91RM9200(2016) Hoja de datos - Atmel Corporation

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Número de pieza
AT91RM9200

componentes Descripción

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page
708 Pages

File Size
4.1 MB

Fabricante
Atmel
Atmel Corporation Atmel

Description
The Atmel® | SMART AT91RM9200 is a complete system-on-chip built around the ARM920T™ ARM® Thumb® processor. It incorporates a rich set of system and application peripherals and standard interfaces in order to provide a single-chip solution for a wide range of compute-intensive applications that require maximum functionality at minimum power consumption at lowest cost.


FEATUREs
● Incorporates ARM920T ARM Thumb Processor
   ̶ 200 MIPS at 180 MHz, Memory Management Unit
   ̶ 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer
   ̶ In-circuit Emulator including Debug Communication Channel
   ̶ Mid-level Implementation Embedded Trace Macrocell™ (256-ball LFBGA Package only)
● Low Power: On VDDCORE 24.4 mA in Normal Mode, 520 µA in Standby Mode
● Additional Embedded Memories
   ̶ 16 Kbytes of SRAM and 128 Kbytes of ROM
● External Bus Interface (EBI)
   ̶ Supports SDRAM, Static Memory, Burst Flash, Glueless Connection to CompactFlash® and NAND
      Flash/SmartMedia®
● System Peripherals for Enhanced Performance:
   ̶ Enhanced Clock Generator and Power Management Controller
   ̶ Two On-chip Oscillators with Two PLLs
   ̶ Very Slow Clock Operating Mode and Software Power Optimization Capabilities
   ̶ Four Programmable External Clock Signals
   ̶ System Timer Including Periodic Interrupt, Watchdog and Second Counter
   ̶ Real-time Clock with Alarm Interrupt
   ̶ Debug Unit, Two-wire UART and Support for Debug Communication Channel
   ̶ Advanced Interrupt Controller with 8-level Priority, Individually Maskable Vectored Interrupt Sources, Spurious
      Interrupt Protected
   ̶ Seven External Interrupt Sources and One Fast Interrupt Source
   ̶ Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, Input Change Interrupt and Open-drain
      Capability on Each Line
   ̶ 20-channel Peripheral DMA Controller (PDC)
● Ethernet MAC 10/100 Base-T
   ̶ Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
   ̶ Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
● USB 2.0 Full Speed (12 Mbits per second) Host Double Port
   ̶ Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)
   ̶ Integrated FIFOs and Dedicated DMA Channels
● USB 2.0 Full Speed (12 Mbits per second) Device Port
   ̶ On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
● Multimedia Card Interface (MCI)
   ̶ Automatic Protocol Control and Fast Automatic Data Transfers
   ̶ MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards
● Three Synchronous Serial Controllers (SSC)
   ̶ Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
   ̶ I2S Analog Interface Support, Time Division Multiplex Support
   ̶ High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
● Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
   ̶ Support for ISO7816 T0/T1 Smart Card
   ̶ Hardware Handshaking
   ̶ RS485 Support, IrDA® Up To 115 Kbps
   ̶ Full Modem Control Lines on USART1
● Master/Slave Serial Peripheral Interface (SPI)
   ̶ 8- to 16-bit Programmable Data Length, 4 External Peripheral Chip Selects
● Two 3-channel, 16-bit Timer/Counters (TC)
   ̶ Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
   ̶ Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
● Two-wire Interface (TWI)
   ̶ Master Mode Support, All 2-wire Atmel EEPROMs Supported
● IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
● Power Supplies
   ̶ 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
   ̶ 3.0V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)
● Packages
   ̶ 208-pin Green PQFP
   ̶ 256-ball RoHS-compliant LFBGA

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

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