Functional Description
The CY7B9911 High Speed Programmable Skew Clock Buffer (PSCB) offers user selectable control over system clock functions. This multiple output clock driver provides the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual TTL drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as 50Ω. They deliver minimal and specified output skews and full swing logic levels.

FEATUREs
■ All output pair skew <100 ps typical (250 max)
■ 3.75 to 100 MHz output operation
■ User selectable output functions
    ❐ Selectable skew to 18 ns
    ❐ Inverted and non-inverted
    ❐ Operation at ½ and ¼ input frequency
    ❐ Operation at 2x and 4x input frequency (input as low as 3.75 MHz)
■ Zero input to output delay
■ 50% duty cycle outputs
■ Outputs drive 50Ω terminated lines
■ Low operating current
■ 32-pin PLCC/LCC package
■ Jitter < 200 ps peak-to-peak (< 25 ps RMS)