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DS2153Q image

Número de pieza
DS2153Q

componentes Descripción

Other PDF
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PDF
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page
60 Pages

File Size
715.2 kB

Fabricante
MaximIC
Maxim Integrated MaximIC

DETAILED DESCRIPTION
The DS2153Q E1 single-chip transceiver (SCT) contains all the necessary functions for connection to E1 lines. The on-board clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to a NRZ serial stream. The DS2153Q automatically adjusts to E1 22 AWG (0.6mm) twisted-pair cables from 0 to 1.5km. The device can generate the necessary G.703 waveshapes for both 75Ω and 120Ω cables. The on-board jitter attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms. It is also used for extracting and inserting signaling data, Si, and Sa-bit information.


FEATURES
■ Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality
■ On-Board Line Interface for Clock/Data Recovery and Waveshaping
■ 32-Bit or 128-Bit Jitter Attenuator
■ Generates Line Build-Outs for Both 120Ω and 75Ω Lines
■ Frames to FAS, CAS, and CRC4 Formats
■ Dual On-Board Two-Frame Elastic Store Slip Buffers That can Connect to Backplanes Up to 8.192MHz
■ 8-Bit Parallel Control Port That can be Used on Either Multiplexed or Nonmultiplexed Buses
■ Extracts and Inserts CAS Signaling
■ Detects and Generates Remote and AIS Alarms
■ Programmable Output Clocks for Fractional E1, H0, and H12 Applications
■ Fully Independent Transmit and Receive Functionality
■ Full Access to Both Si and Sa Bits
■ Three Separate Loopbacks for Testing
■ Large Counters for Bipolar and Code Violations, CRC4 Codeword Errors, FAS Errors, and E Bits
■ Pin Compatible with DS2151Q T1 Single-Chip Transceiver
■ 5V Supply; Low-Power CMOS

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