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Número de pieza
FX802J

componentes Descripción

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14 Pages

File Size
127.7 kB

Fabricante
CML
CML Microsystems Plc CML

Brief Description
The FX802 DVSR Codec contains: A Continuously Variable Slope Delta Modulation (CVSD)
encoder and decoder. Control and timing circuitry for up to 4Mbits of external Dynamic Random Access Memory (DRAM). “C-BUS” µProcessor interface and control logic. When used with external DRAM, the FX802 has four primary functions:

● Speech Storage
Speech signals present at the Audio Input may be digitized by the CVSD encoder, and the resulting bit stream stored in DRAM. This process also provides readings of input power level for use by the system µController.

● Speech Playback
Previously digitized speech data may be read from DRAM and converted back into analogue form by the CVSD decoder.

● Data Storage
Digital data sent over the “C-BUS” from the system µController may be stored in DRAM.

● Data Retrieval
Digital data may be read from DRAM and sent over “C-BUS” to the system µController.
Speech storage and playback may be performed concurrently with data storage or retrieval.

The FX802 may also be used without DRAM (as a “stand
alone” CVSD Codec), in which case direct access is
provided to the CVSD Codec digital data and clock signals.
All functions are controlled by “C-BUS” commands from
the system µController.

The Storage, Recovery and Replay functions of the FX802 can be used for:

●Answering Machine applications, where an incoming speech message is stored for later recall.
●Busy Buffering, an outgoing speech message is stored temporarily until the transmit channel becomes free.
●Automatic transmission of pre-recorded ‘Alarm’ or status announcements.
●Time Domain Scrambling of speech messages.
●VOX control of transmitter functions.
●Temporary Data Storage applications, such as buffering of over-air data transmissions. On-chip the Delta Codec is supported by input and output analogue switched-capacitor filters and audio output switching circuitry. The DRAM control and timing circuitry provides all the necessary address, control and refresh signals to interface to external DRAM. The FX802 DVSR Codec is a low-power 5-volt CMOS LSI device.

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