GENERAL DESCRIPTION
GPR25L6403F is 64Mb bits serial Flash memory, which is configured as 8,388,608 x 8 internally. When it is in four I/O mode, the structure becomes 16,777,216 bits x 4. When it is in two I/O mode, the structure becomes 33,554,432 bits x 2. GPR25L6403F feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.

FEATURES
1.1. GENERAL
• Supports Serial Peripheral Interface -- Mode 0 and Mode 3
• 67,108,864 x 1 bit structure or 33,554,432 x 2 bits (two I/O
   read mode) structure or 16,777,216 x 4 bits (four I/O mode)
   structure
• 2048 Equal Sectors with 4K bytes each
   ― Any Sector can be erased individually
• 256 Equal Blocks with 32K bytes each
   ― Any Block can be erased individually
• 128 Equal Blocks with 64K bytes each
   ― Any Block can be erased individually
• Power Supply Operation
   ― 2.65 ~ 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V

1.2. PERFORMANCE
• High Performance
VCC = 2.65~3.6V
   ― Normal read
   ― 50MHz
   ― Fast read
   ― FAST_READ, DREAD, QREAD: 133MHz with 8 dummy
      cycles
   ― 2READ: 80MHz with 4 dummy cycle, 133MHz with 8
      dummy cycle
   ― 4READ: 80MHz with 6 dummy cycle, 133MHz with 10
      dummy cycle
   ― Configurable dummy cycle number for 2READ and 4READ
      operation
   ― 8/16/32/64 byte Wrap-Around Burst Read Mode
• Low Power Consumption
• Typical 100,000 erase/program cycles
• 20 years data retention

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