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HCS157D

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Intersil
Intersil Intersil

Description
The Intersil HCS157MS is a Radiation Hardened quad 2-input multiplexers which select four bits of data from two sources under the control of a common select input (S). The Enable input (E NOT) is active low. When the enable pin is high all of the outputs (1Y-4Y) are forced low regardless of all other input conditions.
Moving data from two groups of registers to four common output busses is a common use of these devices. The state of the Select input determines the particular register from which the data comes. They can also be used as function generators.
The HCS157MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS157MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).


FEATUREs
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55°C to +125°C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
    - VIL = 30% of VCC Max
    - VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH

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Fabricante
Radiation Hardened Quad 2-Input Multiplexers
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Intersil
Radiation Hardened Quad 2-Input OR Gate ( Rev : 1999 )
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Radiation Hardened Quad 2-Input AND Gate
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Radiation Hardened Quad 2-Input AND Gate
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Radiation Hardened Quad 2-Input NAND Gate
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Intersil
Radiation Hardened Quad 2-Input AND Gate
Ver
Intersil
Radiation Hardened Quad 2-Input OR Gate
Ver
Intersil
Radiation Hardened Quad 2-Input OR Gate
Ver
Intersil
Radiation Hardened Quad 2-Input OR Gate
Ver
Intersil
Radiation Hardened Quad 2-Input NAND Gate
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Intersil

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