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HD74CDCV857 Hoja de datos - Renesas Electronics

HD74CDCV857 image

Número de pieza
HD74CDCV857

componentes Descripción

Other PDF
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PDF
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page
13 Pages

File Size
114.2 kB

Fabricante
Renesas
Renesas Electronics Renesas

Description
The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.


FEATUREs
• DDR266 / PC2100-Compliant
• Supports 60 MHz to 170 MHz operation range
• Distributes one differential clock input pair to ten differential clock outputs pairs
• Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification
• External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input
• Supports 2.5V analog supply voltage (AVCC), and 2.5 V VDDQ
• No external RC network required
• Sleep mode detection
• 48pin TSSOP (Thin Shrink Small Outline Package)

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

Número de pieza
componentes Descripción
PDF
Fabricante
2.5-V Phase-lock Loop Clock Driver
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2.5-V Phase-lock Loop Clock Driver
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2.5-V Phase-lock Loop Clock Driver
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3.3/2.5-V Phase-lock Loop Clock Driver
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3.3-V Phase-lock Loop Clock Driver
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3.3-V Phase-lock Loop Clock Driver
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3.3-V Phase-lock Loop Clock Driver
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Unspecified
3.3-V Phase-lock Loop Clock Driver
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3.3-V Phase-lock Loop Clock Driver
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DDR Phase Lock Loop Clock Driver
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Integrated Circuit Systems

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