[ENE Technology Inc.]
 
Features
Feature Summary
► Low Pin Count Host Interface (LPC)
   ■ SIRQ supporting IRQ1, IRQ12, SCI or SMI# interrupt
   ■ I/O Address Decoding:
      ● KBC IO Port 60h/64h
      ● Programmable EC IO Port 62h/66h
      ● Programmable 4-byte Index I/O ports to access internal registers
      ● One Programmable I/O write byte-address decoding (for example, it can be
         used to decode Port_80h)
   ■ Support CLKRUN# as a slave device
► X-Bus Bus Interface (XBI)
   ■ Interfaces to ISA-Type memory and I/O devices
   ■ Addressable memory range up to 2MB
   ■ The 64K code memory of 8051 can be mapped onto 2 independent 16KB pages
   ■ 2 SELIO# for expended IO (XIO) by directly connecting to TTL (74373, 74244)
► 8051 Microprocessor
   ■ Industry 8051 Instruction set complaint with 3~5 cycles per instruction.
   ■ Programmable 4/8/16 MHz clock
   ■ Fast instruction fetching from XBI Interface
   ■ 128 bytes and 2KB tightly-coupled SRAM
   ■ Twenty-four extended interrupt sources
   ■ Two 16-bit tightly-coupled Timers
► 8042 Keyboard Controller
   ■ 8 Standard keyboard commands processed by hardware
   ■ Each hardware command can be optionally processed by firmware
► PS/2 Controller
   ■ External PS/2 device operation in firmware mode operation
      (no hardware mode available)
   ■ Support three external PS/2 devices
   ■ Optimized hardware for firmware processing
► Internal Keyboard Encoder (IKB)
   ■ 18x8 keyboard scan matrix
   ■ Optimized hardware for firmware processing
   ■ Support W2K Internet / multimedia keys
   ■ Support hot-key events
   ■ Ghost key phenomenon cancellation (Continue ...)