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LPC2478 Hoja de datos - NXP Semiconductors.

LPC2478FBD208 image

Número de pieza
LPC2478

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93 Pages

File Size
500.4 kB

Fabricante
NXP
NXP Semiconductors. NXP

General description
NXP Semiconductors designed the LPC2478 microcontroller, powered by the ARM7TDMI-S core, to be a highly integrated microcontroller for a wide range of applications that require advanced communications and high quality graphic displays. The LPC2478 microcontroller has 512 kB of on-chip high-speed flash memory. This flash memory includes a special 128-bit wide memory interface and accelerator architecture that enables the CPU to execute sequential instructions from flash memory at the maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM microcontroller family of products. The LPC2478, with real-time debug interfaces that include both JTAG and embedded trace, can execute both 32-bit ARM and 16-bit Thumb instructions.


FEATUREs and benefits
■ ARM7TDMI-S processor, running at up to 72 MHz.
■ 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access.
■ 98 kB on-chip SRAM includes:
    ◆ 64 kB of SRAM on the ARM local bus for high performance CPU access.
    ◆ 16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
    ◆ 16 kB SRAM for general purpose DMA use also accessible by the USB.
    ◆ 2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.
■ LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film Transistors (TFT) displays.
    ◆ Dedicated DMA controller.
    ◆ Selectable display resolution (up to 1024  768 pixels).
    ◆ Supports up to 24-bit true-color mode.
■ Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention.
■ EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as single data rate SDRAM.
■ Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
■ General Purpose DMA (GPDMA) controller on AHB that can be used with the SSP, I2S-bus, and SD/MMC interface as well as for memory-to-memory transfers.
■ Serial Interfaces:
    ◆ Ethernet MAC with MII/RMII interface and associated DMA controller. These functions reside on an independent AHB.
    ◆ USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and associated DMA controller.
    ◆ Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO.
    ◆ CAN controller with two channels.
    ◆ SPI controller.
    ◆ Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
    ◆ Three I2C-bus interfaces (one with open-drain and two with standard port pins).
    ◆ I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with the GPDMA.
■ Other peripherals:
    ◆ SD/MMC memory card interface.
    ◆ 160 General purpose I/O pins with configurable pull-up/down resistors.
    ◆ 10-bit ADC with input multiplexing among 8 pins.
    ◆ 10-bit DAC.
    ◆ Four general purpose timers/counters with 8 capture inputs and 10 compare outputs. Each timer block has an external count input.
    ◆ Two PWM/timer blocks with support for three-phase motor control. Each PWM has an external count input.
    ◆ RTC with separate power domain. Clock source can be the RTC oscillator or the APB clock.
    ◆ 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the rest of the chip is powered off.
    ◆ WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator, the RTC oscillator, or the APB clock.
■ Single 3.3 V power supply (3.0 V to 3.6 V).
■ 4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as the system clock.
■ Four reduced power modes: idle, sleep, power-down and deep power-down.
■ Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0 and port 2 can be used as edge sensitive interrupt sources.
(Continue ...)


APPLICATIONs
■ Industrial control
■ Medical systems
■ Portable electronics
■ Point-of-Sale (POS) equipment

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Número de pieza
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Fabricante
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