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M36L0T7050T0ZAQT Hoja de datos - STMicroelectronics

M36L0T7050T0 image

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M36L0T7050T0ZAQT

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ST-Microelectronics
STMicroelectronics ST-Microelectronics

SUMMARY DESCRIPTION
   The M36L0T7050T0 and M36L0T7050B0 combine two memory devices in a Multi-Chip Package: a 128-Mbit, Multiple Bank Flash memory, the M30L0T7000T0 or M30L0T7000B0, and a 32-Mbit PseudoSRAM, the M69AW048B. Recommended operating conditions do not allow more than one memory to be active at the same time.

   The memory is offered in a Stacked TFBGA88 (8x10mm, 8x10 ball array, 0.8mm pitch) package. In addition to the standard version, the packages are also available in Lead-free version, in compliance with JEDEC Std J-STD-020B, the ST ECOPACK 7191395 Specification, and the RoHS (Restriction of Hazardous Substances) directive.

   All packages are compliant with Lead-free soldering processes.
   The memory is supplied with all the bits erased (set to ‘1’).


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