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Número de pieza
MAX3873

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12 Pages

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768.7 kB

Fabricante
MaximIC
Maxim Integrated MaximIC

General Description
The MAX3873 is a compact, low-power 2.488Gbps/2.67Gbps clock-recovery and data-retiming IC for SDH/SONET applications. The phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The input data is then retimed by this recovered clock, providing a clean data output. The MAX3873 meets all SDH/SONET jitter specifications, does not require an external reference clock to aid in frequency acquisition, and provides excellent tolerance to both deterministic and sinusoidal jitter. The MAX3873 provides a PLL loss-of-lock (LOL) output to indicate whether the CDR is in lock. The recovered data and clock outputs are CML with on-chip 50Ω back terminations on each line. The clock output can be powered down if not used.


FEATUREs
♦ Fully Integrated Clock Recovery and Data Retiming
♦ Power Dissipation: 260mW with +3.3V Supply
♦ Clock Jitter Generation: 5mUIRMS
♦ Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications
♦ Differential Input Range: 50mVP-P to 1.6VP-P
♦ Single +3.3V Power Supply
♦ PLL Fast Track (FASTRACK) Mode Available
♦ Clock Output Can Be Disabled
♦ Input Data Rate: 2.488Gbps or 2.67Gbps
♦ Selectable Output Amplitude
♦ Tolerates 2000 Consecutive Identical Digits
♦ Loss-of-Lock Indicator
♦ Differential CML Data and Clock Outputs
♦ Operating Temperature Range: -40°C to +85°C


APPLICATIONs
    Switch Matrix Backplanes
    SDH/SONET Receivers and Regenerators
    Add/Drop Multiplexers
    Digital Cross-Connects
    SDH/SONET Test Equipment
    DWDM Transmission Systems

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