Description
The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH.
The 100 Series contains temperature compensation.

FEATUREs
• 525 ps Propagation Delay
• 2.2G Hz Toggle Frequency
• ESD Protection:
   ♦ > 1 kV Human Body Model
   ♦ > 100 V Machine Model
• PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V
• Internal Input Pulldown Resistors on J, K, CLK, and R
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity:
   ♦ Level 1 for SOIC−8 NB
   ♦ Level 3 for TSSOP−8
   ♦ For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL−94 V−0 @ 0.125 in, Oxygen Index 28 to 34
• Transistor Count = 81 Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant