Octal 3-State Inverting Buffer/Line Driver/Line Receiver
High–Performance Silicon–Gate CMOS

The MC54/74HC240A is identical in pinout to the LS240. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This octal noninverting buffer/line driver/line receiver is designed to be used with 3–state memory address drivers, clock drivers, and other sub–oriented systems. The device has inverting outputs and two active–low output enables.
The HC240A is similar in function to the HC241A and HC244A.

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
   No. 7A
• Chip Complexity: 120 FETs or 30 Equivalent Gates