Hex 3-State Inverting Buffer with Common Enables   
High–Performance Silicon–Gate CMOS
   
The MC54/74HC366 is identical in pinout to the LS366. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device is a high–speed hex buffer with 3–state outputs and two common active–low Output Enables. When either of the enables is high, the buffer outputs are placed into high–impedance states. The HC366 has inverting outputs.
   
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
    No. 7A
• Chip Complexity: 78 FETs or 19.5 Equivalent Gates