The MC68322 is a high-performance integrated printer processor, which combines an MC68000 compatible EC000 Core processor, a RISC graphics processor (RGP) and a print engine video controller (PVC) with numerous system integration features on a single integrated circuit. It is the first of Motorola's M68000 family designed specifically for laser printers. The MC68322 provides a unique solution for new designs as well as an excellent migration path for existing M68000-powered printers. Additionally, the new chip will find ready application to the inkjet printer and multifunction-peripheral (Fax/Modem/Printer) markets and other embedded control applications, which require very fast bit manipulations. The MC68322 provides outstanding performance at an extremely affordable price.

• Static EC000 Core Processor
– Complete Code Compatibility with M68000 Family
– Glueless Interface to Peripherals
– 256 Mbyte Address Range
• Graphics Execution Unit (GEU)
– Memory Reduction Techniques
- Run Length Encoded Scan Line Tables
– RISC Graphics Processor (RGP)
- Processes Multi-Operation Graphics Orders from Display List
- Produces Compressed Bit Map Image using Hardware Banding
- Dedicated Graphics Bus Allows up to 8 PPM Performance at 600 DPI Resolution
– Print Engine Video Controller (PVC)
- Converts Bit Map Image to Serial Data Stream and Feeds Print Engine
- Generic, Programmable, Non-Impact Printer Communications Interface
- Toner Conservation Technique
– Dedicated High-Performance DMA Controller for GEU Operations
• Bus Interface Unit (BIU)
– Dual Bus Architecture Allows Separate Buses to Function Independently
– Distributed Processing Optimizes System Performance
• System Integration Module (SIM)
– 8 Programmable Chip Selects
– 256 Kbytes to 512 Mbytes of PROM Address Space
– Independently Programmable Timing Parameters for each ROM Bank
– Integrated System Timer
• DRAM System Integration Module (DSIM)
– Supports 512 Kbyte, 2 Mbyte, and 8 Mbyte DRAM Bank Sizes
– Directly Controls up to 6 Banks of DRAM; Supports up to 48 Mbytes of DRAM
– Programmable Transparent Refresh of DRAM Banks
– Bursting DRAM Interface
• General-Purpose DMA Controller Module
– Provides High Speed Downloads Without Impact to Core Processor Performance
• IEEE 1284 Parallel Port Controller Module
– DMA Controller Supports 2 Mbyte/sec Bidirectional Communication Transfers
• 16MHz or 20MHz Operation
• 160 Pin Plastic Quad Flat Pack (QFP)