Introduction
The MC68HC05K1 and MC68HC05K0 are members of Motorola’s low-cost, high-performance M68HC05 Family of 8-bit microcontroller units (MCU). The M68HC05 Family is based on the customer-specified integrated circuit (CSIC) design strategy. All MCUs in the family use the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types.
On-chip memory includes 504 bytes of user read-only memory (ROM) and 32 bytes of user random-access memory (RAM).
The MC68HC05K1 has an additional 64-bit personality, erasable, programmable, read-only memory (PEPROM). In an MC68HC05K1
MCU, the PEPROM cannot be erased and serves as a 64-bit array of one-time programmable ROM (OTPROM).
Appendix A. MC68HCL05K0 introduces the MC68HCL05K0, a low-power version of the MC68HC05K0.
Appendix B. MC68HSC05K0 introduces the MC68HSC05K0, a high-speed version of the MC68HC05K0.

FEATUREs
Features of the MC68HC05K0 and MC68HC05K1 include:
• M68HC05 CPU
• Memory-mapped input/output (I/O) registers
• 504 bytes of ROM including eight user vector locations
• 32 bytes of user RAM
• 64-bit PEPROM/OTPROM (MC68HC05K1 only)
• 10 bidirectional input/output (I/O) pins with these features:
   – Software programmable pulldown devices
   – Four I/O pins with 8-mA current sinking capability
   – Four I/O pins with maskable external interrupt capability
• Hardware mask and flag for external interrupts
• Fully static operation with no minimum clock speed
• On-chip oscillator with connections for a crystal/ceramic resonator or for a mask-optional 2-pin or 3-pin resistor-capacitor (RC) oscillator
• Computer operating properly (COP) watchdog
• 15-bit multifunction timer with real-time interrupt circuit
• Power-saving stop, wait/halt, and data-retention modes
• 8 × 8 unsigned multiply instruction
• Illegal address reset
• Low-voltage reset
• 16-pin plastic dual in-line package (PDIP)
• 16-pin small outline integrated circuit package (SOIC)