Device Overview
The MC9S08SH32 members of the low-cost, high-performance HCS08 Family of 8-bit microcontroller units (MCUs). All MCUs in the family use the enhanced HCS08 core and are available with a variety of modules, memory sizes, memory types, and package types.

MC9S08SH32 Series Features
8-Bit HCS08 Central Processor Unit (CPU)
• 40-MHz HCS08 CPU (central processor unit)
• HC08 instruction set with added BGND instruction
• Support for up to 32 interrupt/reset sources

On-Chip Memory
• FLASH read/program/erase over full operating
   voltage and temperature
• Random-access memory (RAM)
• Security circuitry to prevent unauthorized access
   to RAM and FLASH contents

Power-Saving Modes
• Two very low power stop modes
• Reduced power wait mode
• Very low power real time counter for use in run,
wait, and stop

Clock Source Options
• Oscillator (XOSC) — Loop-control Pierce
   oscillator; Crystal or ceramic resonator range of
   31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
• Internal Clock Source (ICS) — Internal clock
   source module containing a frequency-locked
   loop (FLL) controlled by internal or external
   reference; precision trimming of internal reference
   allows 0.2% resolution and 2% deviation over
   temperature and voltage; 1.5% deviation using
   internal temperature compensation.
• ICS supports bus frequencies from 2 MHz to
   20 MHz.

System Protection
• Watchdog computer operating properly (COP)
   reset with option to run from dedicated 1-kHz
   internal clock source or bus clock
• Low-voltage detection with reset or interrupt;
   selectable trip points
• Illegal opcode detection with reset
• Illegal address detection with reset
• FLASH block protect

Development Support
• Single-wire background debug interface
• Breakpoint capability to allow single breakpoint
   setting during in-circuit debugging (plus two more
   breakpoints in on-chip debug module)
• On-chip, in-circuit emulation (ICE) debug module
   containing two comparators and nine trigger
   modes. Eight deep FIFO for storing
   change-of-flow address and event-only data.
   Debug module supports both tag and force
   breakpoints.