DESCRIPTION
The 74F841–74F846 bus interface latch series are designed to provide extra data width for wider address/data paths of buses carrying parity.
The 74F841–74F846 series are funcitonally an pin compatible to the AMD AM29841–AM29846 series.
The 74F841 consists of ten D-type latches with 3-State outputs. The flip-flops appear transparent to the data when Latch Enable (LE) is High. This allows asynchronous operation, as the output transition follows the data in transition. On the LE High-to-Low transition, the data that meets the setup and hold time is latched.

FEATURES
• High speed parallel latches
• Extra data width for wide address/data paths or buses carrying parity
• High impedance NPN base input structure minimizes bus loading
• IIL is 20µA vs 1000A for AM29841 series
• Buffered control inputs to reduce AC effects
• Ideal where high speed, light loading, or increased fan-in are required as with MOS microprocessors
• Positive and negative over-shoots are clamped to ground
• 3-State outputs glitch free during power-up and power-down
• 48mA sink current
• Slim dual in-line 300 mil package
• Broadside pinout
• Pin-for-pin and function compatible with AMD AM29841-846 series