General Description
NT68P61A is a monitor component µC for auto-sync and digital controlled applications. It contains a 6502 8-bit CPU core, 256 bytes of RAM used as working RAM and stack area, 24K bytes of OTP ROM**, 14-channel 8-bit PWM D/A converters, 2-channel A/D converters for key detection saving I/O pins, one 8 bit pre-loadable base timer, internal Hsync and Vsync signals processor providing mode detection, watch-dog timer preventing system from abnormal operation, and an I2C bus interface. The LVRC enables NT68P61A operate properly.

FEATUREs
■  40 pin DIP & 42 pin SDIP package
■  Operating Voltage Range: 4.5V to 5.5V
■  CMOS technology for low power consumption
■  Crystal oscillator or ceramic resonator* available
■  6502 8-bit CMOS CPU core
■  8MHz operation of frequency
■  24K bytes of OTP (one time programming) ROM
■  256 bytes of RAM (which stores EDID for DDC1/2B)
■  One 8-bit pre-loadable base timer
■  14 channels of 8 bit PWM outputs:
   6 channel with 5V open drain and 8 channel with 12V
   open drain
■  2 channel A/D converters with 6-bit resolution
■  24 bi-directional I/O port pins and 1 I/P pin
■  Hsync/Vsync signal processor
■  Hardware sync signals polarity & freq. evaluator
■  Built-In I2C bus interface
■  Supporting VESA DDC1/2B function
■  Six-interrupt sources
   - INTV (Vsync INT)
   - INTE (External INT with rising edge trigger)
   - INTMR(Timer INT )
   - INTA (Slave Address Matched INT)
   - INTD (Shift Register INT)
   - INTS (SCL GO-LOW INT)
■  Hardware watch-dog timer function
■  Built-In Low Voltage reset circuit (LVRC)