General description
The PCK946 is a low voltage CMOS 1 : 10 clock buffer. The 10 outputs can be configured into a standard fan-out buffer or into 1× and 1⁄2× combinations. The ten outputs were designed and optimized to drive 50 Ω series or parallel terminated transmission lines. With output-to-output skews of 350 ps, the PCK946 is ideal as a clock distribution chip for synchronous systems which need a tight level of skew from a large number of outputs.

FEATUREs
■ 2 selectable LVCMOS/LVTTL clock inputs
■ 350 ps output-to-output skew
■ Drives up to 20 series terminated independent clock lines
■ Maximum input/output frequency of 150 MHz
■ 3-stateable outputs
■ 32-lead LQFP packaging
■ 3.3 V VCC supply voltage