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Q67100-H6534-B701 Hoja de datos - Siemens AG

PEB2054 image

Número de pieza
Q67100-H6534-B701

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page
269 Pages

File Size
1.3 MB

Fabricante
Siemens
Siemens AG Siemens

Overview
The PEB 2055 (Extended PCM Interface Controller) is a highly integrated controller circuit optimized for analog and ISDN line card and central switches applications. The EPIC-1 provides the circuitry necessary to manage up to 32 digital (ISDN or proprietary) or 64 analog subscribers.
The EPIC-1 is dedicated to switch PCM data between two serial interfaces, the system interface (PCM interface) and the configurable interface (CFI). The EPIC-1 performs non-blocking time and space switching for up to 128 channels.


FEATUREs
Switching
• Board Controller for up to
   – 32 ISDN or 64 analog subscribers (PEB 2055)
   – 16 ISDN or 32 analog subscribers (PEB 2054)
• Non-blocking switch for
   – 128 channels (PEB 2055)
   – 64 channels (PEB 2054)
• Switching of 16-, 32-, or 64-kbit/s channels
• Two consecutive 64-kbit/s channels can be switched as a single 128-kbit/s channel
• Freely programmable time slot assignment for all subscribers
• Two serial interfaces (PCM and CFI) programmable over a wide data range (128 - 8192 kbit/s)
• Data rates of PCM and configurable interface independent from each other (data rate adaptation)
• PCM-interface
   – Tristate control signals for external drivers
   – Programmable clock shift
   – Single or double data clock
• Configurable interface
   – Configurable for IOM-, SLD- and PCM-applications
   – High degree of flexibility for datastream adaptation
   – Programmable clockshift
   – Single or double data clock
• Synchronous µP-access to two selected channels

Handling of Layer-1 Functions
• Change detection for C/I-channel (IOM-configuration) or feature control (SLD-configuration)
• Double last-look logic for C/I-channel (IOM-2 analog configuration)
• Additional last-look logic for feature control (SLD-configuration)
• Buffered monitor (IOM-configuration) or signaling channel (SLD-configuration)

Bus Interface
• Siemens/Intel or Motorola type µP-interface
• 8-bit demultiplexed bus interface
• FIFO-access interrupt or DMA controlled

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