datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga
HOME  >>>  Silicon Storage Technology  >>> SST34HF1621 PDF

SST34HF1621 Hoja de datos - Silicon Storage Technology

SST34HF1621 image

Número de pieza
SST34HF1621

Other PDF
  no available.

PDF
DOWNLOAD     

page
32 Pages

File Size
425 kB

Fabricante
SST
Silicon Storage Technology SST

PRODUCT DESCRIPTION
The SST34HF1621/1641 ComboMemory devices integrate a 1M x16 CMOS flash memory bank with a 256K x8/128K x16 or 512K x8/ 256K x16 CMOS SRAM memory bank in a Multi-Chip Package (MCP). These devices are fabricated using SST’s proprietary, high-performance CMOS SuperFlash technology incorporating the split-gate cell design and thick oxide tunneling injector to attain better reliability and manufacturability compared with alternate approaches. The SST34HF1621/1641 devices are ideal for applications such as cellular phones, GPSs, PDAs and other portable electronic devices in a low power and small form factor system.


FEATURES:
• Flash Organization: 1M x16
• Dual-Bank Architecture for Concurrent Read/Write Operation
    – 16 Mbit: 12 Mbit + 4 Mbit
• SRAM Organization:
    – 2 Mbit: 256K x8 or 128K x16
    – 4 Mbit: 512K x8 or 256K x16
• Single 2.7-3.3V Read and Write Operations
• Superior Reliability
    – Endurance: 100,000 Cycles (typical)
    – Greater than 100 years Data Retention
• Low Power Consumption:
    – Active Current: 25 mA (typical)
    – Standby Current: 20 µA (typical)
• Hardware Sector Protection (WP#)
    – Protects 4 outer most sectors (4 KWord) in the larger bank by holding WP# low and unprotects by holding WP# high
• Hardware Reset Pin (RST#)
    – Resets the internal state machine to reading data array
• Sector-Erase Capability
    – Uniform 1 KWord sectors
• Block-Erase Capability
    – Uniform 32 KWord blocks
• Read Access Time
    – Flash: 70 and 90 ns
    – SRAM: 70 and 90 ns
• Latched Address and Data
• Fast Erase and Word-Program:
    – Sector-Erase Time: 18 ms (typical)
    – Block-Erase Time: 18 ms (typical)
    – Chip-Erase Time: 70 ms (typical)
    – Word-Program Time: 14 µs (typical)
    – Chip Rewrite Time: 8 seconds (typical)
• Automatic Write Timing
    – Internal VPP Generation
• End-of-Write Detection
    – Toggle Bit
    – Data# Polling
    – Ready/Busy# pin
• CMOS I/O Compatibility
• JEDEC Standard Command Set
• Conforms to Common Flash Memory Interface (CFI)
• Packages Available
    – 56-ball LFBGA (8mm x 10mm)

Page Link's: 1  2  3  4  5  6  7  8  9  10  More Pages 

Número de pieza
componentes Descripción
PDF
Fabricante
16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory
Ver
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory
Ver
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory
Ver
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 4/8 Mbit PSRAM ComboMemory
Ver
Silicon Storage Technology
16 Mbit Concurrent SuperFlash ( Rev : 2001 )
Ver
Silicon Storage Technology
16 Mbit (x8/x16) Concurrent SuperFlash
Ver
Silicon Storage Technology
16 Mbit (x8/x16) Concurrent SuperFlash
Ver
Silicon Storage Technology
2 Mbit Flash + 1 Mbit SRAM ComboMemory
Ver
Silicon Storage Technology
2 Mbit Flash + 1 Mbit SRAM ComboMemory ( Rev : 2001 )
Ver
Silicon Storage Technology
4 Mbit Flash + 1 Mbit or 256 Kbit SRAM ComboMemory
Ver
Silicon Storage Technology

Share Link: GO URL

EnglishEnglish Korean한국어 Chinese简体中文 Japanese日本語 Russianрусский

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]