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STTS2002

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  2011   lastest PDF  

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56 Pages

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1.1 MB

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ST-Microelectronics
STMicroelectronics ST-Microelectronics

Description
The STTS2004 is targeted for DDR4 DIMM modules in servers, desktops, and mobile personal computing platforms (laptops and other industrial applications). The thermal sensor (TS) in the STTS2004 is compliant with the JEDEC specification TSE2004a2, which defines memory module thermal sensor requirements for use in DRAM DIMMs (Dual Inline Memory Modules) with Serial Presence Detect (SPD), in which all the information concerning the DRAM module configuration (such as access speed, size, and organization) can be kept write-protected in one or more of the blocks of memory. The 4-Kbit serial EEPROM (SPD) in the STTS2004 is organized as two pages of 256 bytes each, or 512 bytes of total memory. Each page is comprised of two 128-byte blocks. The SPD is able to selectively lock the data in any or all of the four 128-byte blocks. The STTS2004 can interface to buses which have multiple devices on a shared bus, and each device has its own unique address on this bus. The device can achieve substantial power savings by using the software-programmed shutdown mode.


FEATUREs
• 2.2 V memory module temperature sensor with integrated 4 Kb SPD EEPROM
• Fully compliant with JEDEC TSE2004B2 specifications
• Operating temperature range: –20 °C to +125 °C
• Single supply voltage 2.2 V to 3.6 V
• 2 mm x 3 mm TDFN8, height: 0.80 mm (max): JEDEC MO-229, W2030D compliant RoHS compliant, halogen-free

Temperature sensor
• Temperature sensor resolution: programmable (9-12 bits) 0.25 °C (typ)/LSB - (10-bit) default
• Temperature sensor accuracy (max) of:
   ± 1 °C (from +75 °C to +95 °C);
   ± 2 °C (from +40 °C to +125 °C);
   ± 3 °C (from –20 °C to +125 °C)
• ADC conversion time: 125 ms (max) / 70 ms (typ) at default resolution (10-bit)
• Typical operating supply current 160 μA (EEPROM standby)
• Temperature hysteresis selectable set points from 0, 1.5, 3, 6.0 °C

4 Kb SPD EEPROM
• Functionality identical to ST’s M34E04 SPD EEPROM
• 4 Kbits organized as two pages of 256 bytes each
• Each page is composed of two 128-byte blocks
• Software data protection for each 128-byte block
• Byte Write within 5 ms
• 16 bytes Page Write within 5 ms
• More than 1 million write cycles
• More than 40-year data retention

Two-wire bus
• Two-wire I2C compatible serial interface
• Supports up to 1 MHz transfer rate (I2C Fast Mode+)
• Does not initiate clock stretching
• Supports SMBus timeout 25 ms - 35 ms

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