General Description
The SY89468U is a 2.5V, 1:20 LVDS fanout buffer with a 2:1 differential input multiplexer (MUX). A unique Fail-Safe Input (FSI) protection prevents metastable output conditions when the selected input clock fails to a DC voltage (voltage between the pins of the differential input drops significantly below 100mV).

FEATUREs
• Selects between two inputs, and provides 20 precision LVDS copies
• Fail-Safe Input
   – Prevents outputs from oscillating when input is invalid
• Guaranteed AC performance over temperature and supply voltage:
   – DC to >1.5GHz throughput
   – < 1200ps Propagation Delay (In-to-Q)
   – < 270ps Rise/Fall times
• Ultra-low jitter design:
   – <1psRMS random jitter
   – <1psRMS cycle-to-cycle jitter
   – <10psPP total jitter (clock)
   – <0.7psRMS MUX crosstalk induced jitter
• Unique, patented MUX input isolation design minimizes adjacent channel crosstalk
• Unique, patented internal termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS)
• Wide input voltage range VCC to GND
• 2.5V ±5% supply voltage
• -40°C to +85°C industrial temperature range
• Available in 64-pin EPAD-TQFP package

APPLICATIONs
• Fail-safe clock protection
• Ultra-low jitter LVDS clock or data distribution
• Rack-based Telecom/Datacom