8051 Microcontrollers

Active Errata List
• UART/Reception in Modes 1, 2 and 3/UART False Start Bits Detection
• During UART Reception, Clearing REN May Generate Unexpected IT
• Timer 2/Downcounter Mode/Double IT with Slow External Clock
• JBC/Double IT when External Interrupt Occurs During JBC Instruction
• On Start-up the Microncontroller Goes Into Test Mode