GENERAL DESCRIPTION
The TDA9321H (see Fig.1) is an input processor for ‘High-end’ television receivers. It contains the following functions:
    • Multistandard IF amplifier with PLL demodulator
    • QSS-IF amplifier and AM sound demodulator
    • CVBS and Y/C switch with various inputs and outputs
    • Multistandard colour decoder which can also decode the PALplus helper signal
    • Integrated baseband delay line (64 µs)
    • Sync processor which generates the horizontal and vertical drive pulses for the feature box (100 Hz applications) or display processor (50 Hz applications).
The supply voltage for the TDA9321H is 8 V.

FEATURES
• Multistandard Vision IF (VIF) circuit with Phase-Locked Loop (PLL) demodulator
• Sound IF (SIF) amplifier with separate input for single reference Quasi Split Sound (QSS) mode and separate Automatic Gain Control (AGC) circuit
• AM demodulator without extra reference circuit
• Switchable group delay correction circuit which can be used to compensate the group delay pre-correction of the B/G TV standard in multistandard TV receivers
• Several (I2C-bus controlled) switch outputs which can be used to switch external circuits such as sound traps, etc.
• Flexible source selection circuit with 2 external CVBS inputs, 2 Luminance (Y) and Chrominance (C) (or additional CVBS) inputs and 2 independently switchable outputs
• Comb filter interface with CVBS output and Y/C input
• Integrated chrominance trap circuit
• Integrated luminance delay line with adjustable delay time
• Integrated chrominance band-pass filter with switchable centre frequency
• Multistandard colour decoder with 4 separate pins for crystal connection and automatic search system
• PALplus helper demodulator
• Possible blanking of the helper signals for PALplus and EDTV-2
• Internal baseband delay line
• Two linear RGB inputs with fast blanking; the RGB signals are converted to YUV signals before they are supplied to the outputs; one of the RGB inputs can also be used as YUV input
• Horizontal synchronization circuit with switchable time constant for the PLL and Macrovision/subtitle gating
• Horizontal synchronization pulse output or clamping pulse input/output
• Vertical count-down circuit
• Vertical synchronization pulse output
• Two-level sandcastle pulse output
• I2C-bus control of various functions
• Low dissipation.