AD1852 Ver la hoja de datos (PDF) - Analog Devices

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AD1852

Stereo, 24-Bit, 192 kHz, Multibit, Sigma-Delta DAC

Analog Devices 

AD1852

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Analog Performance .................................................................... 3

Digital I/O (0°C to 70°C)............................................................. 4

Temperature Range ...................................................................... 4

Power.............................................................................................. 4

Digital Filter Characteristics ....................................................... 4

Group Delay .................................................................................. 4

Digital Timing............................................................................... 5

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

REVISION HISTORY

11/09—Rev. 0 to Rev. A

Changes to Format .............................................................Universal

Changes to Note 1............................................................................. 1

Changes to Table 2............................................................................ 3

Changes to Table 11.......................................................................... 7

Changes to Register Addresses Section and Mute Section ....... 14

Changes to Figure 29...................................................................... 16

1/00—Revision 0: Initial Version

Typical Performance Characteristics ..............................................9

Theory of Operation ...................................................................... 12

Serial Data Input Port ................................................................ 12

Serial Data Input Mode ............................................................. 12

Master Clock Autodivide Feature ............................................ 13

SPI Register Definitions ............................................................ 13

Register Addresses...................................................................... 14

Volume Left and Volume Right Registers ............................... 14

SPI Timing................................................................................... 14

Mute ............................................................................................. 14

Control Register ......................................................................... 15

De-Emphasis ............................................................................... 15

Output Impedance ..................................................................... 15

Reset ............................................................................................. 15

Control Signals ........................................................................... 15

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 18

Rev. A | Page 2 of 20

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