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DM9008 Ver la hoja de datos (PDF) - Davicom Semiconductor, Inc.

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DM9008
Davicom
Davicom Semiconductor, Inc. Davicom
DM9008 Datasheet PDF : 68 Pages
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Logical Device Control Registers
Index
Name
30H
Activate
Type
R/W
31H
I/O Range Check
R/W
Logical Device Configuration Registers
Memory Configuration Registers
Index
Name
Type
40H
BROM base address
R/W
bits[23:16]
41H
BROM base address
R/W
bits[15:0]
42H
Memory Control
R
I/O Configuration Registers
Index
Name
60H
I/O base address
bits[15:8]
Type
R/W
61H
I/O base address
R/W
bits[7:0]
DM9008
ISA/Plug & Play Super Ethernet Contoller
Definition
For each logical device, there is one Activate register that
controls whether or not the device is active on the ISA bus.
Bit[0], if set, activates the logical device. Before a logical
device is activated, I/O range check must be disabled
This register is used to perform a conflict check on the I/O
port range programmed for use by a logical device
Bit[1] - This bit, when set, enables I/O range check
I/O range check is only valid when the logical device is
inactive
Bit[0] - If set, this bit forces logical device to respond to I/O
reads within logical device's assigned I/O range with
a55H when I/O range check is in operation. If clear, the
logical device drives AAH
Definition
Bits[23:20] and bit[17] are read only when their values = 0.
All other bits are read/write bits
Bits[13:8] are read only when their values = 0.
All other bits are read/write bits
00H (Only 8-bit operation is supported for BROM)
Definition
Bits[15:10] are read-only with undetermined values. Bit[9] is
read only, and is always 1.
All other bits are read/write bits
Bits[4:0] are read only when their values = 0.
All other bits are read/write bits
28
Final
Version: DM9008-DS-F02
November 30, 2000

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