CDB6420 Ver la hoja de datos (PDF) - Cirrus Logic

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CDB6420

Full-Duplex Speakerphone Chip

Cirrus Logic 

CS6420

Register 3

b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0

AErle

00

AFNse

00

THDet

00

TSAtt

00

TSBias

00

TSThd HHold 1

1

0

00

0

1

1

0

Bits

15-14

Name

AErle

Function

AEC ERLE Threshold

13-12

AFNse

AEC Full-Duplex Noise Threshold

11-10

THDet

Tx Half-Duplex Detection Threshold

9-8

TSAtt

Tx Suppression Attenuation

7-6

TSBias

Tx Suppression Bias

5-4

TSThd

3

HHold

Tx Suppression Threshold

Hold in Half-Duplex on Howl

Word

00*

01

10

11

00*

01

10

11

00*

01

10

11

00*

01

10

11

00*

01

10

11

00*

01

10

11

0*

1

Operation

24 dB

18 dB

30 dB

reserved

zero

-42 dB

-54 dB

reserved

5 dB

3 dB

6 dB

reserved

18 dB

12 dB

24 dB

reserved

18 dB

15 dB

21 dB

reserved

15 dB

12 dB

9 dB

reserved

disable

enable

* Denotes reset value

Table 6. Register 3 Bit Definitions

AErle - Acoustic ERLE Threshold

The CS6420 will allow full-duplex operation only

when the Acoustic ERLE it provides exceeds AEr-

le. See also AFNse. See Glossary for a definition

of ERLE.

AFNse - Acoustic Full-Duplex Noise Threshold

AFNse works in conjunction with AErle to deter-

mine when the CS6420 should transition into full-

duplex operation. If the current noise level at the

near-end input is greater than AFNse, then AErle is

used to determine if full-duplex is allowed. If the

noise level is below the level of AFNse, the

CS6420 uses an internal estimate of asymptotic

performance to determine whether or not to transi-

tion to full-duplex. If AFNse is zero, AErle is al-

ways used as the full-duplex criterion. The other

values exist for cases where there may not be an

acoustic path to converge to.

THDet - Transmit Half-Duplex Detection

18

DS205PP2

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