MX98745 Ver la hoja de datos (PDF) - Macronix International
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MX98745 Datasheet PDF : 36 Pages
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MX98745
H. Link Status Register (register #25) (R)
Bit(s)
25.15:8
25.7
Name
Reserved
LinkP7
25.6
LinkP6
25.5
LinkP5
25.4
LinkP4
25.3
LinkP3
25.2
LinkP2
25.1
LinkP1
25.0
LinkP0
Description
Always 0.
1 : Link Status is OK at port 7
0 : Link Status is Fail at Port 7
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 6
0 : Link Status is Fail at Port 6
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 5
0 : Link Status is Fail at Port 5
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 4
0 : Link Status is Fail at Port 4
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 3
0 : Link Status is Fail at Port 3
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 2
0 : Link Status is Fail at Port 2
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 1
0 : Link Status is Fail at Port 1
Status is updated at every LSCLK clock.
1 : Link Status is OK at port 0
0 : Link Status is Fail at Port 0
Status is updated at every LSCLK clock.
R/W
R
R
R
R
R
R
R
R
R
Table 6-8 Link Status Register Bit Definition
P/N:PM0427
REV. 1.4, JUL. 8, 1998
19
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