4.11 Switching Characteristics—Serial Control Port—I2C Slave Mode
CS
CLK/SCL
tspicss
tspickl
0
1
2
6
7
0
5
6
7
fspisck
tspickh
tspicsh
MOSI
MISO/SDA
INT
BUSY/
I2C_SELECT
A6
tspidsu
A5
tspidh
A0 R/W MSB
tspidov
MSB
LSB
tspiirqh
LSB
tspibsyl
tspicsdz
tspiirql
Figure 4-5. Serial Control Port—SPI Slave Mode Timing
4.11 Switching Characteristics—Serial Control Port—I2C Slave Mode
Parameter
Symbol Min
Typical
Max
Units
SCL frequency1
SCL low time
SCL high time
SCL and SDA rise time
SCL and SDA fall time
SCL rising to SDA rising or falling for START or STOP condition
START condition to SCL falling
SCL falling to STOP condition
Bus free time between STOP and START conditions
Setup time SDA input valid to SCL rising
SDA input hold time after SCL falling
SDA output hold time from SCL falling
SCL falling to INT rising
NAK condition to INT low
SCL rising to BUSY low
fiicck
—
—
400
kHz
tiicckl
1.25
—
—
µs
tiicckh
1.25
—
—
µs
tr
—
—
75
ns
tf
—
—
75
ns
tiicckcmd 1.25
—
—
µs
tiicstscl 1.25
—
—
µs
tiicstp
2.5
—
—
µs
tiicbft
3
—
—
µs
tiicsu
100
—
—
ns
tiich
0
—
—
ns
thddo
—
—
18
ns
tiicirqh
—
—
3*DCLKP + 40
ns
tiicirql
3*DCLKP + 20
—
ns
tiicbsyl
— 3*DCLKP + 20
—
ns
1.The specification fiicck indicates the maximum speed of the hardware. The system designer should be aware that the actual maximum speed of the
communication port can be limited by the firmware application. Flow control using the BUSY pin should be implemented to prevent overflow of the
input data buffer.
DS1057F1
18