IDT70P248L Ver la hoja de datos (PDF) - Integrated Device Technology
Número de pieza
componentes Descripción
Lista de partido
IDT70P248L Datasheet PDF : 23 Pages
| |||
IDT70P258/248L
Low Power 1.8V 8K/4K x 16 Dual-Port Static RAM
Industrial Temperature Range
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(4)
70P258/248
Ind'l Only
Symbol
Parameter
Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
55
____
ns
tAA
Address Access Time
tACE
Chip Enable Access Time(3)
tABE
Byte Enable Access Time(3)
tAOE
Output Enable Access Time(3)
____
55
ns
____
55
ns
____
55
ns
____
30
ns
tOH
Output Hold from Address Change
tLZ
Output Low-Z Time(1,2,5)
tHZ
Output High-Z Time(1,2,5)
tPU
Chip Enable to Power Up Time(1,2)
tPD
Chip Disable to Power Down Time(1,2)
tSOP
Semaphore Flag Update Pulse (OE or SEM)
tSAA
Semaphore Address Access(3)
5
____
ns
5
____
ns
____
25
ns
0
____
ns
____
55
ns
15
____
ns
____
55
ns
NOTES:
5675 tbl 11
1. Transition is measured 0mV from Low or High-impedance voltage with Output Test Load.
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL, UB or LB = VIL, and SEM = VIH. To access semaphore, CE = VIH or UB and LB = VIH, and SEM = VIL.
4. The specification for tDH must be met by the device supplying write data to the SRAM under all operating conditions. Although tDH and tOW values will vary over
voltage and temperature, the actual tDH will always be smaller than the actual tOW.
5. At any given temperature and voltage condition, tHZ is less than tLZ for any given device.
6.842
Share Link: 