![](/html/AMICC/255608/page29.png)
Power On Sequence & Auto Refresh
A45L9332A Series
0
CLOCK
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19
CKE
High level is necessary
CS
tRP
tRC
RAS
CAS
ADDR
KEY
Ra
A10/BA
KEY
BS
A9/AP
KEY
Ra
WE
DSF
DQM
DQ
High level is necessary
High-Z
Precharge
(All Banks)
Auto Refresh
Auto Refresh
PRELIMINARY (October, 2001, Version 0.1)
28
Mode Regiser Set
Row Active
(Write per Bit
Enable or Disable)
: Don't care
AMIC Technology, Inc.