AD73322 Ver la hoja de datos (PDF) - Analog Devices
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AD73322 Datasheet PDF : 43 Pages
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AD73322
Parameter
DIGITAL GAIN TAP
Gain at Maximum Setting
Gain at Minimum Setting
Gain Resolution
Delay
Settling Time
AD73322A
Min Typ Max Units
+1
V
–1
V
16
Bits
25
µs
100
µs
DAC SPECIFICATIONS
Maximum Voltage Output Swing2
Single-Ended
Differential
Nominal Voltage Output Swing (0 dBm0)
Single-Ended
Differential
Output Bias Voltage
Absolute Gain
Gain Tracking Error
Signal to (Noise + Distortion) at 0 dBm0
PGA = 6 dB
Total Harmonic Distortion at 0 dBm0
PGA = 6 dB
Intermodulation Distortion
Idle Channel Noise
Crosstalk DAC-to-ADC
3.156
3.17
6.312
9.19
2.1908
0
4.3918
6.02
2.4
+0.4
± 0.1
77
–80
–85
–85
–90
V p-p
dBm
V p-p
dBm
V p-p
dBm
V p-p
dBm
V
dB
dB
dB
dB
dB
dBm0
dB
DAC-to-DAC
Power Supply Rejection
Group Delay4, 5
Output DC Offset2, 7
Minimum Load Resistance, RL2, 8
Single-Ended
Differential
Maximum Load Capacitance, CL2, 8
Single-Ended
Differential
FREQUENCY RESPONSE
(ADC and DAC)9 Typical Output
Frequency (Normalized to FS)
0
0.03125
0.0625
0.125
0.1875
0.25
0.3125
0.375
0.4375
> 0.5
–77
dB
–100
dB
–65
dB
25
µs
50
µs
+12
mV
150
Ω
150
Ω
500 pF
100 pF
0
dB
–0.1
dB
–0.25
dB
–0.6
dB
–1.4
dB
–2.8
dB
–4.5
dB
–7.0
dB
–9.5
dB
< –12.5
dB
Test Conditions/Comments
Tested to 5 MSBs of Settings
Includes DAC Delay
Tap Gain Change from –FS to +FS; Includes
DAC Settling Time
5VEN = 1
PGA = 6 dB
Max Output = (3.156/2.4) × VREFCAP
PGA = 6 dB
Max Output = 2 × ([3.156/2.4] × VREFCAP)
PGA = 6 dB
PGA = 6 dB
REFOUT Unloaded
1.0 kHz, 0 dBm0; Unloaded
1.0 kHz, +3 dBm0 to –50 dBm0
Refer to Figure 8
300 Hz to 3400 Hz; fSAMP = 64 kHz
300 Hz to 3400 Hz; fSAMP = 64 kHz
PGA = 0 dB
PGA = 0 dB
ADC Input Signal Level: AGND; DAC
Output Signal Level: 1.0 kHz, 0 dBm0;
Input Amplifiers Bypassed
Input Amplifiers Included In Input Channel
DAC1 Output Signal Level: AGND; DAC2
Output Signal Level: 1.0 kHz, 0 dBm0
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
Interpolator Bypassed
–6–
REV. B
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