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AD7891
(Rev.:RevA)

LC2MOS 8-Channel, 12-Bit High Speed Data Acquisition System

Analog Devices 

Mnemonic

VINXA, VINXB

VDD

AGND

DGND

STANDBY

REF OUT/REF␣ IN

REF GND

CONVST

EOC

MODE

NC

AD7891

PIN FUNCTION DESCRIPTIONS

Description

Analog Input Channels. The AD7891 contains eight pairs of analog input channels. Each channel con-

tains two input pins to allow a number of different input ranges to be used with the AD7891. There are

two possible input voltage ranges on the AD7891-1. The ± 5␣ V input range is selected by connecting the

input voltage to both VINXA and VINXB, while the ± 10␣ V input range is selected by applying the input

voltage to VINXA and connecting VINXB to AGND. The AD7891-2 has three possible input ranges. The

0 V to +2.5␣ V input range is selected by connecting the analog input voltage to both VINXA and VINXB; the

0 V to +5␣ V input range is selected by applying the input voltage to VINXA and connecting VINXB to AGND

while the ± 2.5␣ V input range is selected by connecting the analog input voltage to VINXA and connecting

VINXB to REF␣ IN (provided this REF IN voltage comes from a low impedance source). The channel to be

converted is selected by the A2, A1 and A0 bits of the control register. In the parallel interface mode,

these bits are available as three data input lines (DB3 to DB5) in a parallel write operation while in the

serial interface mode, these three bits are accessed via the DATA IN line in a serial write operation. The

multiplexer has guaranteed break-before-make operation.

Positive supply voltage, +5 V ± 5%.

Analog Ground. Ground reference for track/hold, comparator and DAC.

Digital Ground. Ground reference for digital circuitry.

Standby Mode Input. TTL-compatible input which is used to put the device into the power save or

standby mode. The STANDBY input is high for normal operation and low for standby operation.

Voltage Reference Output/Input. The part can either be used with its own internal reference or with an

external reference source. The on-chip +2.5␣ V reference voltage is provided at this pin. When using this

internal reference as the reference source for the part, REF␣ OUT should be decoupled to REF␣ GND with

a 0.1␣ µF disc ceramic capacitor. The output impedance of the reference source is typically 2␣ kΩ. When

using an external reference source as the reference voltage for the part, the reference source should be

connected to this pin. This overdrives the internal reference and provides the reference source for the

part. The reference pin is buffered on-chip but must be able to sink or source current through this 2␣ kΩ

resistor to the output of the on-chip reference. The nominal reference voltage for correct operation of the

AD7891 is +2.5 V.

Reference Ground. Ground reference for the part’s on-chip reference buffer. The REF OUT pin of the

part should be decoupled with a 0.1␣ µF capacitor to this REF GND pin. If the AD7891 is used with an

external reference, the external reference should also be decoupled to this pin. The REF␣ GND pin should

be connected to the AGND pin or the system’s AGND plane.

Convert Start. Edge-triggered logic input. A low to high transition on this input puts the track/hold into

hold and initiates conversion. When changing channels on the part, sufficient time should be given for

multiplexer settling and track/hold acquisition between the channel change and the rising edge of CONVST.

End-of-Conversion. Active low logic output indicating converter status. The end of conversion is signified

by a low-going pulse on this line. The duration of this EOC pulse is nominally 80␣ ns.

Interface Mode. Control input which determines the interface mode for the part. With this pin at a logic

low, the AD7891 is in its serial interface mode; with this pin at a logic high, the device is in its parallel

interface mode.

No Connect. The two NC pins on the device can be left unconnected. If they are to be connected to a

voltage it should be to ground potential. To ensure correct operation of the AD7891, neither of the NC

pins should be connected to a logic high potential.

REV. A

–7–

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