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ADL5562

3.3 GHz Ultralow Distortion RF/IF Differential Amplifier

Analog Devices 

Data Sheet

ADL5562

SOLDERING INFORMATION

On the underside of the chip scale package, there is an exposed

compressed paddle. This paddle is internally connected to the

ground of the chip. Solder the paddle to the low impedance

ground plane on the PCB to ensure the specified electrical

performance and to provide thermal relief. To further reduce

thermal impedance, it is recommended that the ground planes

on all layers under the paddle be stitched together with vias.

EVALUATION BOARD

Figure 45 shows the schematic of the ADL5562 evaluation board.

The board is powered by a single supply in the 3 V to 3.6 V range.

The power supply is decoupled by 10 µF and 0.1 µF capacitors.

Table 14 details the various configuration options of the evaluation

board. Figure 46 and Figure 47 show the component and circuit

layouts of the evaluation board.

To realize the minimum gain (6 dB into a 200 Ω load), Input 1

(VIN1 and VIP1) must be used by installing 0 Ω resistors at R3

and R4, leaving R5 and R6 open. R1 and R2 must be 33 Ω for a

50 Ω input impedance.

Likewise, driving Input 2 (VIN2 and VIP2) realizes the middle

gain (12 dB into a 200 Ω load) by installing 0 Ω at R5 and R6

and leaving R3 and R4 open. R1 and R2 must be 29 Ω for a

50 Ω input impedance.

For the maximum gain (15.5 dB into a 200 Ω load), both inputs

are driven by installing 0 Ω resistors at R3, R4, R5, and R6. R1

and R2 must be 40.2 Ω for a 50 Ω input impedance.

The balanced input and output interfaces are converted to

single ended with a pair of baluns (M/A-COM ETC1-1-13).

The balun at the input, T1, provides a 50 Ω single-ended-to-

differential transformation. The output balun, T2, and the

matching components are configured to provide a 200 Ω to 50 Ω

impedance transformation with an insertion loss of about 17 dB.

GND ENBL

16 15 14 13

VPOS

GND GND GND GND

P1

C8

0.1µF

J1

1 VIP2

ENBL 12

AGND

T1

C1

0.01µF

R5

0Ω

R1

R3

2 VIP1

ADL5562

VOP 11

C9

0.01µF

R7

R9

84.5Ω 34.8Ω

T2

R11

OPEN

J3

40.2Ω C2

0Ω

C12

0.1µF

0.01µF

R2

R4

40.2Ω

0Ω

3 VIN1

4 VIN2

VON 10

VOCM 9

C10

0.01µF

R8

R10

84.5Ω 34.8Ω

C13

0.1µF

VCC VCC VCC VCC

C11

R6

5

6

7

8

0Ω

0.1µF

J2

VPOS

C3

10µF

C4

C5

C6

C7

0.1µF 0.1µF 0.1µF 0.1µF

Figure 45. Evaluation Board Schematic

Table 14. Evaluation Board Configuration Options

Component Description

VPOS, GND Ground and supply vector pins.

C3, C4, C5, Power supply decoupling. The supply decoupling consists of a 10 µF capacitor (C3)

C6, C7, C11 to ground. C4 to C7 are bypass capacitors. C11 ac couples VREF to ground.

J1, R1, R2, R3,

R4, R5, R6, C1,

C2, C12, T1

Input interface. The SMA labeled J1 is the input. T1 is a 1-to-1 impedance ratio balun

to transform a single-ended input into a balanced differential signal. C1 and C2

provide ac coupling. C12 is a bypass capacitor. R1 and R2 provide a differential 50 Ω

input termination. R3 to R6 are used to select the input for the pin-strappable gain.

Maximum gain: R3, R4, R5, R6 = 0 Ω; and R1, R2 = 40.2 Ω. Middle gain: R5, R6 = 0 Ω; and R3,

R4 = open; R1, R2 = 33 Ω. Minimum gain: R3, R4 = 0 Ω; and R5, R6 = open; R1, R2 = 29 Ω.

J3, R7, R8, R9,

R10, R11, C9,

C10, C13, T2

Output interface. The SMA labeled J3 is the output. T2 is a 1-to-1 impedance ratio

balun to transform a balanced differential signal to a single-ended signal. C13 is a

bypass capacitor. R7, R8, R9, and R10 are provided for generic placement of matching

components. The evaluation board is configured to provide a 200 Ω to 50 Ω impedance

transformation with an insertion loss of 17 dB. C9 and C10 provide ac coupling.

ENBL, P1, C8 Device enable. C8 is a bypass capacitor. When the P1 jumper is set toward the VPOS label,

the ENBL pin is connected to the supply, enabling the device. In the opposite direction,

toward the GND label, the ENBL pin is grounded, putting the device in power-down mode.

Default Condition

VPOS, GND = installed

C3 = 10 µF (Size D),

C4, C5, C6, C7, C11 = 0.1 µF (Size 0402)

J1 = installed,

R1, R2 = 40.2 Ω (Size 0402),

R3, R4, R5, R6 = 0 Ω (Size 0402),

C1, C2 = 0.01 µF (Size 0402),

C12 = 0.1 µF (Size 0402)

T1 = ETC1-1-13 (M/A-COM)

J3 = installed,

R7, R8 = 84.5 Ω (Size 0402),

R9, R10 = 34.8 Ω (Size 0402),

R11 = open (Size 0402),

C9, C10 = 0.01 µF (Size 0402),

C13 = 0.1 µF (Size 0402)

T2 = ETC1-1-13 (M/A-COM)

ENBL, P1= installed,

C8 = 0.1 µF (Size 0402)

Rev. F | Page 19 of 21

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