AIC1574 Ver la hoja de datos (PDF) - Analog Intergrations
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AIC1574
Analog Intergrations
AIC1574 Datasheet PDF : 20 Pages
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AIC1574
Table 1 VOUT1 Voltage Program (0=connected to GND, 1=open or connected to 5V)
For all package versions
PIN NAME
DACOUT
PIN NAME
VID4 VID3 VID2 VID1 VID0 VOLTAGE VID4 VID3 VID2 VID1 VID0
0
1
1
1
1
1.30V
1
1
1
1
1
0
1
1
1
0
1.35V
1
1
1
1
0
0
1
1
0
1
1.40V
1
1
1
0
1
0
1
1
0
0
1.45V
1
1
1
0
0
0
1
0
1
1
1.50V
1
1
0
1
1
0
1
0
1
0
1.55V
1
1
0
1
0
0
1
0
0
1
1.60V
1
1
0
0
1
0
1
0
0
0
1.65V
1
1
0
0
0
0
0
1
1
1
1.70V
1
0
1
1
1
0
0
1
1
0
1.75V
1
0
1
1
0
0
0
1
0
1
1.80 V
1
0
1
0
1
0
0
1
0
0
1.85 V
1
0
1
0
0
0
0
0
1
1
1.90 V
1
0
0
1
1
0
0
0
1
0
1.95 V
1
0
0
1
0
0
0
0
0
1
2.00 V
1
0
0
0
1
0
0
0
0
0
2.05 V
1
0
0
0
0
DACOUT
VOLTAGE
INHIBIT
2.1 V
2.2 V
2.3 V
2.4 V
2.5 V
2.6 V
2.7 V
2.8 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
3.4 V
3.5 V
A multi-layer-printed circuit board is recom-
mended. Figure 11 shows the connections of
the critical components in the converter. The CIN
and COUT could each represent numerous
physical capacitors. Dedicate one solid layer for
a ground plane and make all critical component
ground connections with vias to this layer.
PWM Output Capacitors
The load transient for the microprocessor core
requires high quality capacitors to supply the
high slew rate (di/dt) current demand.
The ESR (equivalent series resistance) and ESL
(equivalent series inductance) parameters rather
than actual capacitance determine the buck ca-
pacitor values. For a given transient load magni-
tude, the output voltage transient change due to
the output capacitor can be note by the follow-
ing equation:
∆VOUT = ESR × ∆IOUT + ESL × ∆IOUT
∆T ,
∆IOUT is transient load current step.
where
After the initial transient, the ESL dependent
term drops off. Because the strong relationship
between output capacitor ESR and output load
transient, the output capacitor is usually chosen
for ESR, not for capacitance value. A capacitor
with suitable ESR will usually have a larger ca-
pacitance value than is needed for energy stor-
age.
A common way to lower ESR and raise ripple
16
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