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AM79C961AKCW

PCnet™-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA

Advanced Micro Devices 

INSTRUCTION SET FOR THE XXC56 SERIES OF EEPROMS

Instruction

SB

Op

Code

READ

1

10

Address

x8

x16

A8–A0

A7–A0

EWEN

1

00

11XXXXXXX

11XXXXXX

ERASE

1

11

WRITE

1

01

A8–A0

A0–A0

A7–A0

A7–A0

ERAL

1

00

10XXXXXXX

10XXXXXX

WRAL

1

00

01XXXXXXX

01XXXXXX

EWDS

1

00

00XXXXXXX

00XXXXXX

Data

x8

x16

Comments

D7–D0

D7–D0

Reads data stored in memory, at

specified address

Write enable must precede all

programming modes

Erases memory location An–A0

D15–D0 Writes memory location An–A0

D15–D0

Erases all memory locations.

Valid only at VCC = 4.5 V to 5.5 V

Writes all memory locations. Valid

when VCC = 5.0 V ± 10% and

Disable Register cleared

Disables all programming

instructions

VIH

CS

VIL

VIH

SK

VIL

VIH

DI

VIL

DO (READ) VOH

VOL

VOH

DO (PROGRAM)

VOL

tCSS

tSKH

1 µs (1)

tSKL

tDIS

tDIH

tPDO

tSV

tPDI

Status Valid

Note:

1. This is the minimum SK period.

Typical XXC56 Series

Serial EEPROM Control Timing

tCSH

tDF

tDF

19364B-91

202

Am79C961A

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