CDB42406 Ver la hoja de datos (PDF) - Cirrus Logic

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CDB42406

Evaluation Board For CS42406

Cirrus Logic 

CDB42406

1.7.3a Setup 7

An external DSP connected to DSP I/O HDR masters all clocks for the ADC/DAC and pro-

vides data to the DAC. Subclocks for the ADC/DAC are input via DSP_ADC_LRCK and

DSP_ADC_SCLK. For implementation of this setup option, set DIP switch S4 (SW[3:0])

to ‘0111’b.

AUDIO

MCLK

CS8416

OMCK

RM CK

OL RC K /

OSCLK

S DO U T

CS8406

OM CK

IL RC K /

IS C LK

SD IN

CS42406

M C LK

DAC_LRCK/

DAC_SCLK

D A C _S D INx

ADC_L RCK/

AD C _S C LK

A D C_ S DO U T

DSP I/O

HDR

DSP_ MCLK

DSP_ DAC_L RCK/

DSP_ DAC_SCLK

D S P _S D IN x

DSP_ ADC_L RCK/

DSP_ ADC_SCLK

D S P _S DO U T

Figure 8. DSP Routing - Setup 7

1.7.3b Setup 8

Using the on-board crystal oscillator, AUDIO MCLK, a DSP connected to DSP I/O HDR

masters the subclocks for the ADC/DAC and provides data to the DAC. Subclocks for the

ADC/DAC are input via DSP_ADC_LRCK and DSP_ADC_SCLK. For implementation of

this setup option, set DIP switch S4 (SW[3:0]) to ‘1000’b.

AUDIO

MCLK

CS8416

RMCK

OMCK

OLRC K/

OSC LK

SD OUT

CS 8406

OMCK

ILRCK /

ISCLK

SD IN

CS42406

MCLK

DAC _LRCK/

DAC _SCLK

DAC _SDINx

AD C_LRCK/

AD C_SC LK

ADC _SDOU T

DSP I/O

HDR

DS P_M CLK

DS P_DA C_LRCK /

DS P_DA C_SCLK

DSP_SDIN x

DSP_AD C_LRCK/

DSP_AD C_SCLK

DSP_SD OUT

Figure 9. DSP Routing - Setup 8

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