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CMX605(2001) Ver la hoja de datos (PDF) - CML Microsystems Plc

Número de pieza
componentes Descripción
Lista de partido
CMX605
(Rev.:2001)
CML
CML Microsystems Plc CML
CMX605 Datasheet PDF : 27 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Digital Line to POTS Interface
CMX605
CMX605
D4/P3
Pin No.
11
12
13
14
15
16
Signal
Description
Name
VBIAS
RXIN
OPNIN
OPOUT
RING
VDD
Type
O/P An internally generated bias voltage of VDD/2,
except when the device has been reset, VBIAS
will discharge to VSS. It should be decoupled to
VSS by a capacitor mounted close to the device
pins.
I/P The input to the DTMF decoder, internally
biased at VDD/2. It should be ac coupled.
I/P The inverting input to the uncommitted
amplifier.
O/P The output of the uncommitted amplifier.
O/P The squarewave output of the Ringing Signal
generator.
Power
The positive supply rail. Levels and thresholds
within the device are proportional to this
voltage. It should be decoupled to VSS by a
capacitor mounted close to the device pins.
Notes:
I/P
= Input
O/P = Output
T/S = 3-state Output
This device is capable of detecting and decoding small amplitude signals. To achieve this VDD
and VBIAS decoupling and protecting the receive path from extraneous in-band signals are very
important. It is recommended that the printed circuit board is laid out with a ground plane in the
CMX605 area to provide a low impedance connection between the VSS pin and the VDD and
VBIAS decoupling capacitors.
© 2001 Consumer Microcircuits Limited
5
D/605/6

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